The increasing level of integration within electrical integrated circuits (IC) leads to both higher data rates and larger number of IC interconnections. Today, the inherent signal speed of ICs is increasing to 5 GHz, and shortly it will reach 20 GHz and beyond. The number of pin connection is also increasing, with single ICs requiring close to 2000 interconnections (i.e. single processor), and shortly it will increase to over 5000. Simultaneously achieving higher data rates and higher interconnect densities for both on-chip and also off-chip, will be increasingly difficult as the IC technologies continue to evolve increasing signal speed of electronic devices and interconnection number. In on-chip cases (inside the die), as the number of the electronic devices such as transistors are increased with continued development of fabrication technology, interconnecting electronic devices without sacrificing signal speed is becoming an increasing challenge. In the off-chip case, high density interconnects, covering from die-level packaging to chip-to-chip (hereafter chip indicates the die with package) interconnection on the printed circuit board (PCB), will also become increasingly difficult as the IC technologies continue to evolve, thereby increasing the signal speed and interconnection number.
With increased signal speed and interconnection number within and outside of the IC, low-cost high-level interconnect techniques compatible with today's manufacturing technology is highly desirable.
Generally, it is known that if the electronic devices (for both on-chip and off-chip) are connected with the help of the metal conductor (act as the interconnects), electrical signal can be flown and the electronic device can be connected with each other. This is true for low-speed signal, below a few MHz. At multi GHz frequencies, interconnect lengths become a significant fraction of the wavelength of the high frequency harmonics, and therefore interconnects must be designed with proper concern of impedance, cross talk, and attenuation. Significant attenuation and rise-time degradation can be caused by losses in the transmission line. As is readily appreciated by those skilled in the art, the transmission line loss is the sum of the conductor loss and dielectric loss, both of which are dependent on the frequency. This dielectric loss is dependent on the loss tangent (tangent loss) of the materials and it varies from dielectric to dielectric. For example, the PCB materials like FR4 have the loss tangent of 0.018, whereas the alumina has the 0.0008. The less the tangent loss of the dielectric, the lower the transmission loss for the given interconnect distance and fixed conductor loss. Using the low-loss tangent material, would help to increase the signal carrying capacity of the interconnects.
FIG. 1 is the schematic showing part of conventional off-chip interconnection. In off-chip interconnection, such as that shown in FIG. 1, the chip 120 (for example processor or memory) is connected with chip 130 by multilayered electrical signal lines 110 and ground lines 112 contained within PCB 108. Conventional printed circuit board (PCB) materials are mainly FR4, Roger, and alumina. Low cost PCB material is mainly FR4, which is frequently used. The metal used for interconnects is mainly copper which is used for routing the signals.
Conventional interconnection technology for off-chip is mainly based on the microstrip line or strip-line transmission layout on the dielectric material. FIG. 2A shows a cross-sectional of a microstrip layout, which refers to a trace routed as the top or bottom layer for example of a PCB for the case of off-chip interconnection. The electrical conductor 140A with width W and thickness T are laid on the dielectric material 142A having height H. The ground or power line 144A is located opposite of the signal conductor 140A. FIG. 2B is the cross-sectional view of strip line layout, which uses a trace 140B routed on the inside layer 142B for example of a PCB and has two voltage-reference planes (i.e. power and/or ground) 144B and 144B′.
For high-speed signal interconnection, a lower loss tangent is necessary. Lower loss tangent material offers following functions for off-chip interconnects;
(a) higher density interconnection due to reduction of the cross-talk, (b) reducing the capacitance of the interconnection, helping to transfer the signal longer distance, (c) lower propagation delay, and (d) reducing the microwave loss and help to transmit the longer distance. In other words, it helps to transmit the higher speed signal a longer distance.
Besides the dissipation-factor of the dielectric materials, the microwave loss also limits the bandwidth of the interconnection. Microwave-loss occurs due to the electrode structure mainly from skin-depth of the signal. As Cu's skin-depth at 100 GHz is 0.2 μm, the skin-depth due to the conductor structure is neglected. So, the bandwidth of the interconnection (for off-chip interconnection) is mainly dependent on the material loss tangent (dielectric loss).
It is relatively straight forward that increasing the bandwidth can be possible using of the material having lower loss tangent. However, in this case, new PCB material development is necessary. Besides, manufacturing process is also needed to develop compatible to new PCB materials.
Much work can be found in off-chip interconnection technology focusing on the material development for achieving the low-loss tangent material. The development cost of these low loss tangent materials is very high and implementing into the practical system would not only increase the system cost, but also reduce the reliability. Today, other areas of focusing area to overcome the high microwave loss (due to the dielectric) include the use conventional materials such as FR4 (board material), or shortening the length on the interconnection layout to reduce the transmission loss and signal integrity. In both cases, implementing such technology would require one to pay high cost.
As explained above, the conventional electronics interconnect technology being used in off-chip interconnection cannot be used, as the signal speed is increasing. Existing conventional electrical interconnects have the limitation of achieving the bandwidth in certain level, beyond that, either new low loss-tangent material development is necessary or new interconnect technology using conventional material is required. Developing low-loss tangent material and its related manufacturing process for PCB build-up require high investment and time. It is highly desirable to have the innovative interconnect technology, which would use conventional material and conventional manufacturing processes, but a lower effective loss tangent. This technique or technology can be easily implemented as they can use the standard dielectric material used in PCB industries.